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- Formal Verification of Analog AI Hardware (FAI)
- Energy Optimised Analog Circuits for Deep Neural Networks (ENERGICS)
- Formal Abstraction and Verifcation of Analog Circuits (faveAC)
- Analog-Coverage in der Nanoelektronik (ANCONA)
- Hochverlässliches selbst-adaptives Mixed-Signal Multi-Core System-on-Chip(MixedCoreSoC)
- Mikrosystem-Design-Flow für KMUs (MiDes)
- Code-Coverage for Verilog-A Models
- ASDeX (Formalized Specification of Analog Circuits)
- FAC'14 Benchmark Suite
- Equivalence Checking (Vera) Simulation (gnucap-uf)
- Joint Robotics Lab
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- Thesis
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Dipl.-Ing. Oliver Mitea
Research interests
- Synthesis of Analog Circuits
- Electronic Design Automation
- Design of Delta-Sigma Data Converters
Research projects
Highly Optimized Design Methods for Yield and Reliability (HONEY)
Synthesis-supported Design of Analog Circuits (SyEnA)
