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- M. Wedler, D. Stoffel, W. Kunz Exploiting State Encoding for Invariant Generation in Induction-Based Property Checking Proc. of the Asia and South Pacific Design Automation Conference, (ASPDAC), 2004
- T. Nopper and C. Scholl Approximate symbolic model checking for incomplete designs Formal Methods in Computer-Aided Design, pages 290-305, 2004
- M. Wedler, D. Stoffel, W. Kunz Normalization at the Arithmetic Bit-Level Proc. IEEE/ACM Design Automation Conference (DAC), Anaheim CA, USA, 13-17. Juni 2005
- A. Pacholik, W. Fengler, H. Salzwedel, O. Vinogradov Real Time Constraints in System Level Specifications Improving the Verification Flow of Complex Systems Workshop on Object Oriented Software Design for Real Time and Embedded Computer Systems, Erfurt, Germany, Erfurt 19.-22.9.2005
- M. Wedler, D. Stoffel, W.Kunz Frontend model generation for SAT-based property checking Proc. 6th Int. Conference on ASICs, Shanghai, China, 24-27. Oktober 2005
- M. Nguyen, D. Stoffel, M. Wedler, W. Kunz Transition-by-Transition FSM Traversal for Reachability Analysis in Bounded Model Checking Proc. IEEE/ACM Int. Conf. on Computer-Aided Design (ICCAD), San Jose, California, USA, Nov. 2005
- A. Jesser, M. Wedler, L. Hedrich, W. Kunz A case study on applying bounded model checking to analog circuit verification 9. ITG/GI/GMM Workshop "Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen" (MBMV 06), Dresden, Germany, 20 - 22.Februar 2006
- A. Jesser, M. Wedler, L. Hedrich, W. Kunz Advanced unbounded model checking by using AIGs, BDD sweeping and quantifier scheduling. 9. ITG/GI/GMM Workshop "Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen" (MBMV 06), Dresden, Germany, 20 - 22. Februar 2006
- F. Pigorsch, C. Scholl, and S. Disch Automatische Eigenschaftsextraktion auf Systemebene aus SystemC Modellen 9. ITG/GI/GMM Workshop "Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen" (MBMV 06), Dresden, Germany, 20 - 22.Februar 2006
- A. Jesser, L. Hedrich. "A Symbolic Approach for Mixed-Signal Model Checking", The 13th Asia and South Pacific Design Automation Conference (ASP-DAC'08), COEX, Seoul, Korea, pp. 404 - 409, January 2008
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